FPGA开发工程师简历

FPGA开发工程师简历模板使用便捷-高效-实用，高效提升求职效率，做高质量简历就用锤子简历。

.resume_main[data_color] .skill_item .skill_slider span::before{background-color:${color};} .resume_main[data_color] .skill_slider s i{background-color:${relative_skill_color};} .resume_main[data_color] .skill_style_01.skill_item .skill_slider s {border-color:${relative_skill_color};} .resume_main[data_color] .skill_style_01.skill_item .skill_slider s i{background-color:${relative_skill_color};} .resume_main[data_color] .skill_style_04.skill_item .skill_slider[data_level="average"] i,.resume_main[data_color] .skill_style_07.skill_item .skill_slider[data_level="average"] i{box-shadow:24px 0 0 ${relative_skill_color}, 48px 0 0 #ccc, 72px 0 0 #ccc, 96px 0 0 #ccc, 120px 0 0 #ccc;} .resume_main[data_color] .skill_style_04.skill_item .skill_slider[data_level="good"] i,.resume_main[data_color] .skill_style_07.skill_item .skill_slider[data_level="good"] i{box-shadow:24px 0 0 ${relative_skill_color}, 48px 0 0 ${relative_skill_color}, 72px 0 0 #ccc, 96px 0 0 #ccc, 120px 0 0 #ccc;} .resume_main[data_color] .skill_style_04.skill_item .skill_slider[data_level="advanced"] i,.resume_main[data_color] .skill_style_07.skill_item .skill_slider[data_level="advanced"] i{box-shadow:24px 0 0 ${relative_skill_color}, 48px 0 0 ${relative_skill_color}, 72px 0 0 ${relative_skill_color}, 96px 0 0 #ccc, 120px 0 0 #ccc;} .resume_main[data_color] .skill_style_04.skill_item .skill_slider[data_level="expert"] i,.resume_main[data_color] .skill_style_07.skill_item .skill_slider[data_level="expert"] i{box-shadow:24px 0 0 ${relative_skill_color}, 48px 0 0 ${relative_skill_color}, 72px 0 0 ${relative_skill_color}, 96px 0 0 ${relative_skill_color}, 120px 0 0 #ccc;} .resume_main[data_color] .skill_style_08.skill_item .skill_slider[data_level="average"] i{box-shadow:9px 0 0 ${relative_skill_color}, 18px 0 0 ${relative_skill_color}, 27px 0 0 ${relative_skill_color}, 36px 0 0 ${relative_skill_color}, 45px 0 0 ${relative_skill_color},54px 0 0 #ccc,63px 0 0 #ccc,72px 0 0 #ccc,81px 0 0 #ccc;} .resume_main[data_color] .skill_style_08.skill_item .skill_slider[data_level="good"] i{box-shadow:9px 0 0 ${relative_skill_color}, 18px 0 0 ${relative_skill_color}, 27px 0 0 ${relative_skill_color}, 36px 0 0 ${relative_skill_color}, 45px 0 0 ${relative_skill_color},54px 0 0 ${relative_skill_color},63px 0 0 #ccc,72px 0 0 #ccc,81px 0 0 #ccc;} .resume_main[data_color] .skill_style_08.skill_item .skill_slider[data_level="advanced"] i{box-shadow:9px 0 0 ${relative_skill_color}, 18px 0 0 ${relative_skill_color}, 27px 0 0 ${relative_skill_color}, 36px 0 0 ${relative_skill_color}, 45px 0 0 ${relative_skill_color},54px 0 0 ${relative_skill_color},63px 0 0 ${relative_skill_color},72px 0 0 #ccc,81px 0 0 #ccc;} .resume_main[data_color] .skill_style_08.skill_item .skill_slider[data_level="expert"] i{box-shadow:9px 0 0 ${relative_skill_color}, 18px 0 0 ${relative_skill_color}, 27px 0 0 ${relative_skill_color}, 36px 0 0 ${relative_skill_color}, 45px 0 0 ${relative_skill_color},54px 0 0 ${relative_skill_color},63px 0 0 ${relative_skill_color},72px 0 0 ${relative_skill_color},81px 0 0 #ccc;} .resume_main[data_color] .hobby_item .hobby_item_con .hobby_item_list a.alifont{border-color:${relative_hobby_color};color:${relative_hobby_color}; } /* �� */ .resume_main[data_color] .resume_cover .cover_html svg [data-svg="fill"] {fill:${color};} .resume_main[data_color] .resume_cover .cover_html svg [data-svg="stroke"] {stroke:${color};} .resume_main[data_color] .resume_letter .letter_html svg [data-svg="fill"] {fill:${color};} .resume_main[data_color] .resume_letter .letter_html svg [data-svg="stroke"] {stroke:${color};} .resume_main[data_color] .resume_letter .letter_html svg [data-fill="fill"] {fill:${color};} .resume_main[data_color] .resume_cover[data-type="07"] .resume_cover_avatar{border-color: ${color};} .resume_main[data_color] .resume_cover[data-type="07"] .resume_cover_content{background:${color}} .resume_main[data_color] .resume_cover[data-type="07"] .cover_item_list a.alifont{color: ${color};} .resume_main[data_color] .resume_cover[data-type="08"] .resume_cover_content::after{background:${color}} .resume_main[data_color] .resume_cover[data-type="09"] .resume_cover_content{background:${color}} .resume_main[data_color] .resume_cover[data-type="09"] .cover_item_list a.alifont{color: ${color};} .resume_main[data_color] .resume_cover[data-type="10"]{background-color:${color}} .resume_main[data_color] .resume_cover[data-type="11"] .resume_cover_content{background-color:${color}} .resume_main[data_color] .resume_cover[data-type="14"]{background-color:${color}} .resume_main[data_color] .resume_cover[data-type="15"]{background-color:${color}} .resume_main[data_color] .resume_cover[data-type="19"] .resume_cover_word::before{background-color:${color}} .resume_main[data_color] .resume_cover[data-type="20"]{background-color:${color}} .resume_main[data_color] .resume_letter[data-type="06"]{background-color:${color}} .resume_main[data_color] .resume_letter[data-type="12"]{background-color:${color}}

 头像: 隐藏

编辑

["sex","age","nation","education","marriageStatus","politicalStatus","city","jobYear","mobile","email"]

 基本信息: 女

28岁



本科

未婚

中共党员



4年经验

13800138000

BD@100chui.com

 姓名: 锤子简历

在平凡的世界中，做不平凡的自己。

 求职意向: 
FPGA开发工程师


广州


面议


随时到岗

 教育背景: 2015.09 - 2019.06

锤子简历师范大学

计算机信息与技术

GPA：3.72/4（专业前10%） GRE：324

 工作经验

2019.12 - 至今

锤子简历科技有限公司

FPGA开发工程师

负责5GTU物理层通信链路开发方案制定，负责FPGA相关代码开发及调试，与其它子系统进行联调、故障排查等工作。
参与项目主要为与5G基站对接的UE相关开发，FPGA负责上下行物理层协议的实现。该项目使用XilinxVU9P芯片，使用Modelsim 和Verdi仿真，Vivado编译版本。
使用Verilog语言进行代码开发。

2018.10 - 2019.12

锤子简历信息有限公司

FPGA开发工程师

参与项目设计讨论，制定符合项目要求的测试计划，指出项目在FPGA验证过程中可能发生的问题以及解决方案。
按照项目要求，将ASICDesigner的RTL源代码转变成适合FPGA芯片所支持的RTL代码，然后在SOC仿真环境中将FPGA的修改点集成到SOC环境中做进行整体的功能仿真。在仿真完成后将RTL代码进行综合和编译并添加时序约束后，再生成网表文件。经过初步测试后再给ChipDriver人员进行各种功能模块验证。根据ChipDriver人员测试结果，定位测试中碰到的各种问题然后重新修改RTL代码后再重复上述步后进行测试，直至测试无误为止。在项目测试结束后，给出项目的验证文档和测试报告，进行文档的总结和归档。
参与过多个项目的验证测试，包括ROC1/Whale2/iWhale2/WhaleK/NemoG/SharkLJ1/SharkLE/Marlin3E/Adie等手机基带芯片的功能验证。

 项目经验

2021.09 - 2021.11

项目

FPGA开发工程师

下行业务FPGA在PDSCH信道负责对中射频FPGA送出的数字信号进行处理，主要处理过程包括频偏纠正、去除CP、FFT处理、时偏补偿、有效数据抽取、AXC格式转换等，将数据发送给DSP做进一步处理;
做完上述处理之后，继续进行信道估计、信道均衡、Polar 译码、RNTI 校验等处理;
负责TUEFPGA下行时频域链路的开发仿真联合调试等工作；TUEFPGAPDCCH链路的开发仿真及debun等工作；相关FPGA开发方案、调试方法等文档的设计、撰写工作。

 自我评价: 本人对待工作踏实，认真，并且极富工作和团队精神，因此在工作和生活中结交了许多朋友，具有良好的适应性和熟练的沟通技巧，相信能够协助主管人员出色地完成各项工作。综合素质佳，能够吃苦耐劳，忠诚稳重坚守诚信正直原则，勇于挑战自我开发自身潜力，做一个主动的人。本人希望自己能成为一名出色的员工，这是本人的梦想，也是本人的目标！本人愿意同贵公司共同发展、进步！感谢您在百忙之中阅览我的简历，静候佳音！